Nonvolatile memory cells using a floating gate to store charges thereon are well known in the art. See for example, U.S. Pat. Nos. 6,747,310; 6,992,929; 5,883,409; 6,747,310; 7,046,552; 7,217,621. See also U.S. Pat. Nos. 6,936,883; 7,190,018; 6,861,315; 6,420,231; 6,151,248 and 6,103,573. See also “A Dual-bit Split-Gate EEPROM (DSG) Cell in Contactless Array for Single Vcc High Density Flash Memories” by Ma et al., published in IEDM 1994, pp. 57-60.